Silexica Presents With Mentor for a High-Level Synthesis Seminar Series

Presenting HLS Ecosystem Solutions for ASIC and FPGA for IoT Applications

Silexica Presents With Mentor for a High-Level Synthesis Seminar Series

Silexica (SLX) has announced that they will be presenting in a Virtual HLS Seminar Series in May 2020 organized by Mentor, a Siemens business.​ Silexica's SLX Tool Suite empowers software and hardware engineers to deeply analyze C/C++ algorithms for high-level synthesis (HLS) implementation in ASIC and FPGA designs to make better decisions and further accelerate performance. Silexica joined Mentor’s OpenDoor™ partner program in 2019 to advance HLS adoption in FPGAs and ASICs.

"As an ecosystem partner, Silexica's SLX Tool Suite helps Catapult customers develop high-performance synthesis solutions for FPGAs or ASIC IP, significantly improving design productivity," said Ellie Bruns, Director of Marketing, Calypto Systems, Mentor Graphics, a Siemens business. "We're excited to have Silexica partner and present at Mentor's Virtual HLS Seminar Series, demonstrating how they can help make it even easier to go from software to optimized hardware accelerators."

Event: Mentor HLS Seminar Series

Topic: How to Use HLS to Optimize Your AI/ML, Vision and Smart IoT Applications for Performance and Power/Energy

Date & Time:

May 5 & 7, 2020 – Europe, 3:00 p.m. – 6:00 p.m. Europe/Paris

May 19 & 21, 2020 – North America, 10:00 a.m. – 1:00 p.m., US/Pacific

Overcoming the Power Problem with HLS for IoT Applications 

Developing an ecosystem and methodology using high-level synthesis (HLS) design to manage complex designs and cutting the time of design of ASICs and FPGAs is a constant challenge for hardware and software engineers. SLX's Tool Suite, in combination with Catapult™ software HLS platform, provides an HLS design flow and ecosystem for hardware and software engineers to improve performance and support lower uses of power and energy in the design of complex multicore SoCs, ASIC IP, and FPGAs.

"Developing more advanced machine learning/AI for smarter IoT applications for ASICs and FPGAs continues to require deeper application insights, parallelism detection, and memory optimization to reduce design times," said Jordon Inkeles, Vice President of Product, Silexica. "Being part of Mentor's Catapult HLS ecosystem to develop an effective HLS methodology are challenges we are committed to solving so that our customers and partners can develop innovative products."

About Silexica

Silexica (SLX) provides software development tools, allowing technology companies to take innovative IP or intelligent products from concept to deployment. Enabled by metrics-driven software analysis and execution behavior insights, the SLX programming tools disrupt the journey from software to application-specific hardware.

Founded in 2014, Silexica is headquartered in Germany with offices in the US, Japan, and Pakistan. It serves innovative companies in the automotive, robotics, wireless communications, aerospace, and financial industries and has received $28M in funding from international investors.

PR Contact:
Jessica Krings

Note: A list of relevant Siemens trademarks can be found here

Source: Silexica GmbH


Categories: Information Technology

Tags: ASIC, Catapult, Code analysis, FPGA, High-Level Synthesis, HLS, Performance Optimization

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